The 25.6 Tbps capacity enables port densities of up to 64 × 400GbE, 128 × 200GbE, 256 × 100GbE, 256 × 40GbE, 256 × 25GbE, or 256 × 10GbE ports.
Tomahawk 4, which is implemented in 7nm technology with 512 50G PAM4 SerDes, arrives less than two years after the previous 12.8Tbps product generation.
Tomahawk 4 is designed for the backbone for the next generation of hyperscale data center networks.
Broadcom said its Tomahawk 4 accelerates the adoption of 100/200/400GbE Ethernet solutions at a point where optics utilizing 50G PAM4 electrical connectivity are shipping in high volumes.
“The Tomahawk franchise is the flagship for cutting-edge, single-chip performance and integration among Broadcom’s multi-vectored Ethernet switch silicon portfolio, tailored to the unique and rigorous demands of hyperscale data center operators,” said Ram Velaga, senior vice president and general manager, Core Switching Group, Broadcom. “We are proud of our world-class engineering team for innovating and delivering the 25.6Tbps Tomahawk 4 chip in less than two years after we released Tomahawk 3. Broadcom is proving yet again that customers can rely on us to lead the industry on switch silicon performance and execution at every generation.”
Key points for StrataXGS Tomahawk 4:
- Enables the next generation of high-throughput, low latency hyperscale networks with 64 ports of 400GbE switching and routing.
- World’s highest radix of 100GbE ports: 256 ports supported on a single chip, enabling low-latency, single-hop networks for massive alternative compute clusters.
- Robust connectivity using 512 instances of the industry’s highest performance and longest-reach 50G PAM4 SerDes core, enabling long-reach East-West optical links and Direct-Attached-Copper in-rack cabling in the data center.
- The industry’s most advanced 25.6Tbps shared-buffer architecture, offering up to 5X higher incast absorption and providing the highest performance and lowest end-to-end latency for RoCEv2 workloads.
- New advanced load balancing mechanisms, virtually eliminating hash polarization and providing extremely efficient, controllable link utilization.
- Advanced congestion management, enabling new traffic management paradigms.
- Industry-leading instrumentation including IFA 2.0 for inband telemetry, postcards for out-of-band telemetry, SerDes link quality meters, and visibility into all on-chip packet drops and congestion events.
- Four 1 GHz ARM processors for high-bandwidth, fully-programmable streaming telemetry and sophisticated embedded applications such as on-chip statistics summarization.
- Implemented in a monolithic 7nm die.
Broadcom also announced the introduction of Broadcom Open Network Switch APIs (OpenNSA), opening its SDK APIs for StrataXGS and StrataDNX products. Multiple open source network operating system initiatives are underway in the disaggregation ecosystem, focused on hyperscale and service provider markets. OpenNSA enables these initiatives on merchant silicon and allows the larger community to build on top of these efforts. OpenNSA also expands Open Compute Project efforts, like Switch Abstraction Interface (SAI), by simplifying the process of translating SAI APIs to Broadcom SDK APIs. Moreover, OpenNSA accelerates the SDN ecosystem by enhancing the toolset available for the developer community.