Journal of Parallel and Distributes Computing (JPDC)
Special Issue on Systems for Learning, Inferencing, and Discovering (SLID)

https://www.journals.elsevier.com/journal-of-parallel-and-distributed-computing/call-for-papers/special-issue-on-systems-for-learning-inferencing-and-discov

IMPORTANT DATES:
Submission deadline: end of March 2017
First round reviews: June 2017
Revisions and second round reviews: August 2017
Final decisions: October/November 2017

Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers.

This special issue seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms. Topics of interest, of both theoretical and practical significance, include but are not limited to:
– Micro- and System-architectures, including multi- and many-core designs, heterogeneous processors, accelerators (GPUs, vector processors, Automata processor), reconfigurable (coarse grained reconfigurable and FPGA designs) and custom processors
– Network architectures and interconnect (including high-radix networks, optical interconnects)
– Novel memory architectures and designs (including processors-in memory)
– Impact of new computing paradigms on irregular workloads (including neuromorphic processors and quantum computing)
– Modeling, simulation and evaluation of novel architectures with irregular workloads
– Innovative algorithmic techniques
– Combinatorial algorithms (graph algorithms, sparse linear algebra, etc.)
– Impact of irregularity on machine learning approaches
– Parallelization techniques and data structures for irregular workloads
– Data structures combining regular and irregular computations (e.g., attributed graphs)
– Approaches for managing massive unstructured datasets (including streaming data)
– Languages and programming models for irregular workloads
– Library and runtime support for irregular workloads
– Compiler and analysis techniques for irregular workloads
– High performance data analytics applications, including graph databases

This special issue solicits novel, unpublished work, and previously published but significantly extended work. In particular, we invite extended submissions from the 2015 and 2016 editions of IA^3, the SC Workshop on Irregular Applications: Architectures and Algorithms.

SUBMISSION GUIDELINES:
All manuscripts submission and review will be handled by Elsevier Editorial System http://ees.elsevier.com/jpdc.
All papers should be prepared according to JPDC Guide for Authors. It is important that authors select SI: SLID when they reach the “Article Type” step in the submission process.

GUEST EDITORS:
Dr. Antonino Tumeo, Senior Research Scientist, Pacific Northwest National Laboratory
Antonino.Tumeo@pnnl.gov

Dr. John Feo, Director, Northwest Institute of Advanced Computing (NIAC), Pacific Northwest National Laboratory (PNNL)
john.feo@pnnl.gov

Dr. Oreste Villa, Senior Research Scientist, NVIDIA Research
ovilla@nvidia.com